Researchers Develop Scaled-up Spintronic Probabilistic Computer

 OK, technically new to me, but worth a tag here.    I note mention of 'Simulated Quantum Annealing Algorithm'  which was demonstrated to us.  Will follow with further examples as found.

Researchers Develop Scaled-up Spintronic Probabilistic Computer

Tohoku University (Japan), December 7, 2022

Scientists at Japan's Tohoku University, Italy's University of Messina, and the University of California, Santa Barbara have engineered a scaled-up probabilistic computer (p-computer) with stochastic spintronic devices. The researchers demonstrated how stochastic magnetic tunnel junction (sMTJ)-based probabilistic bits (p-bits) can be integrated with field-programmable gate arrays (FPGAs) to implement larger p-bit networks in hardware. They also executed a simulated quantum annealing algorithm in heterogeneous MTJ + FPGA p-computers with systematic assessments for hard combinatorial optimization problems. The researchers benchmarked sMTJ-based p-computer performance against that of classical computing hardware, including graphics processing units and Tensor Processing Units, and found it yields superior throughput and power consumption compared to conventional technologies.